Electronic Design

Embracing Multicore and RISC-V Architectures in SoC Design

There’s been a significant shift toward RISC-V architectures in SoC design. This article highlights its impact on the semiconductor industry and role in fostering innovation and flexibility in ...
Business Wire

SiFive To Introduce New RISC-V Processor Architecture and RISC-V PC at Linley Fall Virtual Processor Conference

SAN MATEO, Calif.--(BUSINESS WIRE)--SiFive, Inc., the leading provider of commercial RISC-V processor IP and silicon solutions, today announced that Dr. Yunsup Lee, CTO of SiFive, and Dr. Krste ...
Forbes

The ISA Wars Have Ended And The Heterogeneous CPU Era Has Arrived

Discussions about CPUs often frame one instruction set architecture (ISA) against another—x86 vs. Arm, Arm vs. RISC-V, and so on. However, it’s common to use multiple CPU architectures in a single ...
AppleInsider

Apple investigating RISC-V instruction set architecture, job listing shows

A job listing posted to Apple's website this week reveals the company is researching RISC-V instruction set architecture solutions, suggesting future in-house chip designs might implement the ...
Electronic Design

Hardware Directory

ARM9T Core The ARM9T family defines a set of RISC cores that are optimized to minimize cost and power dissipation. The family builds around the ARM9 Thumb architecture, a full ARM ISA also capable of ...
Hosted on MSN

Red Hat and Rocky Linux Advance RISC-V Integration

Red Hat Enterprise Linux and Rocky Linux are accelerating efforts to support the RISC-V architecture, signalling a significant shift in the enterprise Linux landscape. This development reflects the ...